This invention relates to an asynchronous semiconductor memory device and more specifically to a semiconductor memory device which has reduced power consumption as a result of holding an internal circuit to a non-operative condition in response to any change of address signal for a specified period following the change of said address signal.
An asynchronous semiconductor memory device is not restricted in input timing of address information and operates immediately in response to change of the external input address signal.
On the other hand, in the case wherein a semiconductor memory device is mounted on a printed circuit board, the rising time and falling time of respective signals on a plurality of address signal lines connected to a semiconductor memory device disperse due to the dispersion of wiring capacitance on a printed circuit board. If signals on a plurality of address signal lines change with some scattered deviation in the timing, the following problem occurs.
For example, when a microprocessor connected to a semiconductor memory device changes the address information from "a" to "b", the unwanted address information "c" is generated because of a deviation of timing of the change of signal.
Since an asynchronous semiconductor memory device operates immediately in response to change of address as explained above, it also responds to such unwanted address information "c" and internal circuits starts the memory cell selecting operation in correspondance to the address information "c". Since the address information "c" is generated within a short period, the selecting operation of the memory cell corresponding to the address information "b" is started before data of the memory cell corresponding to the address information "c" is transmitted to an output buffer, an erroneous data is hardly ever output, but since the condition of the internal circuit changes, power is undesirably consumed. Such power consumption also occurs when noise is added to the address signal lines.